Paper detail

Low-Power Control of Resistance Switching Transitions in First-Order Memristors

In many cases, the behavior of physical memristive devices can be relatively well captured by using a single internal state variable. This study investigates the low-power control of first-order memristive devices to derive the most energy-efficient protocols for programming their resistances. A unique yet general approach to optimizing the switching transitions in devices of this kind is introduced. For pedagogical purposes, without loss of generality, the proposed control paradigm is applied to a couple of differential algebraic equation sets for voltage-controlled devices, specifically Kvatinsky's Voltage ThrEshold Adaptive Memristor mathematical description and Miranda's and Sune's dynamic balance model. It is demonstrated that, depending upon intrinsic physical properties of the device, captured in the model formulas and parameter setting, and upon constraints on programming time and voltages, the optimal protocol for either of the two switching scenarios may require the application of a single square voltage pulse of height set to a certain level within the admissible range across a fraction or entire given programming time interval, or of some more involved voltage stimulus of unique polarity, including analogue continuous waveforms that can be approximated by trains of square voltage pulses of different heights, over the entire programming time interval. The practical implications of these research findings are significant, as the development of energy-efficient protocols to program memristive devices, resolving the so-called voltage-time dilemma in the device physics community, is a subject under intensive and extensive studies across the academic community and industry.