Abstract
One of candidates for the International Linear Collider(ILC)'s vertex detector is the Fine Pixel CCD (FPCCD) with a pixel size of 5 \times 5 (\mum^2). Sensor and readout systems are currently being studied and prototypes have been developed. In this paper we will report on the performance of latest developed readout ASIC prototype as well as the outline of the design strategy for the next ASIC prototype.
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