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Paper detail

Plans for PANDA Online Computing

The PANDA experiment will not use any hardware trigger, i.e. all raw data are streaming in the data acquisition with a bandwidth of ~280 GB/s. The PANDA Online System is designed to perform data reduction by a factor of ~800 by reconstruction algorithms programmed in VHDL (Very High Speed Integrated Circuit Hardware Description Language) on FPGAs (Field Programmable Gate Arrays).

preprint2009arXivOpen access
Jens Soeren LangeDapeng JinDaniel KirschnerAndreas KoppWolfgang KuehnJohannes LangLu LiMing LiuZhenAn LiuDavid MuenchowTiago PerezJohannes RoskossQiang WangHao XuShuo Yang
hep-exphysics.ins-det
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Jens Soeren LangeDapeng JinDaniel KirschnerAndreas KoppWolfgang KuehnJohannes LangLu LiMing LiuZhenAn LiuDavid MuenchowTiago PerezJohannes RoskossQiang WangHao XuShuo Yang

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