Abstract

Errors in quantum logic gates are usually modeled by quantum process matrices (CPTP maps). But process matrices can be opaque, and unwieldy. We show how to transform a gate's process matrix into an error generator that represents the same information more usefully. We construct a basis of simple and physically intuitive elementary error generators, classify them, and show how to represent any gate's error generator as a mixture of elementary error generators with various rates. Finally, we show how to build a large variety of reduced models for gate errors by combining elementary error generators and/or entire subsectors of generator space. We conclude with a few examples of reduced models, including one with just 9N29N^2 parameters that describes almost all commonly predicted errors on an N-qubit processor.

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