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Zhehao Yu

Zhehao Yu contributes to research discovery and scholarly infrastructure.

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Published work

2 published item(s)

preprint2026arXiv

S2FT: Parameter-Efficient Fine-Tuning in Sparse Spectrum Domain

Parameter Efficient Fine-Tuning (PEFT) is a key technique for adapting a large pretrained model to downstream tasks by fine-tuning only a small number of parameters. Recent methods based on Fourier transforms have further reduced the fine-tuned parameters scale by only fine-tuning a few spectral coefficients. Its basic assumption is that the weight change δW is a spatial-domain matrix with a sparse spectrum. However, in this paper, we observe that the spectrum of weight change is not sparse, but instead distributed like power-uniform. This fact implies that fine-tuning only a few spectral coefficients is insufficient to accurately model the weight change with uniform spectrum. To address this issue, we propose to seek an invertible transformation that can transform a latent spatial-domain matrix with sparse spectrum to the weight change, and then perform PEFT on such sparse spectrum domain with few spectral coefficients, called S2FT. To seek such transformation, we first pre-estimate a coarse weight change as a prior. Then, inspired by that sparse spectrum often correspond to locally smooth spatial structures, we regard this transformation as a row and column rearrangement operation on the pre-estimated weight change that smooth spatial structures while keep the structure information of neurons. Finally, we propose to solve the rearrangement search problem in a simple nearest neighbor search manner, thereby obtaining the invertible transformation. Extensive results show our S2FT achieves superior performance by only using 0.08% training parameters.

preprint2026arXiv

Single-Chip 1.024 Tb/s Optical Receiver for High-Speed Optical links

Integrated optical transceivers, utilizing wavelength-division-multiplexing, offer a path forward for implementation of compact, high-bandwidth and energy-efficient interconnects for future data centers. Here we report the demonstration of a monolithically integrated optical receiver in 45nm CMOS, where efficient multi-layer optical demultiplexing with capacitive tuning, energy efficient electronics and wideband inverse designed grating couplers enable implementation of a 32-channel receiver chip based on wavelength-division multiplexing. The chip operates at an aggregate data-rate of 1.024 Tb/s with all channels operating simultaneously at a data-rate of 32 Gb/s/channel achieving a record energy efficiency of 71 fJ/b, including the power consumption of both the electronic circuitry and the tuning and control of photonic devices, and a record bandwidth density of 4 Tb/s/mm2. The receiver achieves a bit-error-rate below 1E-12 without requiring equalization, error correction or digital processing. Inverse-designed broadband grating couplers provide efficient, low-loss optical coupling into the chip. An on-chip demultiplexer, composed of Mach-Zehnder interferometers (MZIs) and ring resonators, offers a large channel-to-channel isolation sufficient for error-free operation. Capacitive phase shifters embedded within the ring resonators of the demultiplexer are used for wavelength alignment at a zero static power consumption. MZIs and ring-resonators are periodically selected and autonomously locked to the wavelength of the corresponding optical carrier. The implemented monolithic receiver offers a scalable, energy-efficient and reliable solution for the beyond Tb/s optical interconnects.