Hold-in, pull-in, and lock-in ranges of PLL circuits: rigorous mathematical definitions and limitations of classical theory

The terms hold-in, pull-in (capture), and lock-in ranges are widely used by engineers for the concepts of frequency deviation ranges within which PLL-based circuits can achieve lock under various additional conditions. Usually only non-strict definitions are given for these concepts in engineering literature. After many years of their usage, F.~Gardner in the 2nd edition of his well-known work, Phaselock Techniques, wrote "There is no natural way to define exactly any unique lock-in frequency" and "despite its vague reality, lock-in range is a useful concept." Recently these observations have led to the following advice given in a handbook on synchronization and communications "We recommend that you check these definitions carefully before using them." In this survey it is shown that, from a mathematical point of view, in some cases the hold-in and pull-in "ranges" may not be the intervals of values but a union of intervals and thus their widely used definitions require clarification. Rigorous mathematical definitions for the hold-in, pull-in, and lock-in ranges are given. An effective solution for the problem on the unique definition of the lock-in frequency, posed by Gardner, is suggested.

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