Paper detail

Gate-tunable Spin-Galvanic Effect in Graphene Topological insulator van der Waals Heterostructures at Room Temperature

Unique electronic spin textures in topological states of matter are promising for emerging spin-orbit driven memory and logic technologies. However, there are several challenges related to the enhancement of their performance, electrical gate-tunability, interference from trivial bulk states, and heterostructure interfaces. We address these challenges by integrating two-dimensional graphene with a three-dimensional topological insulator (TI) in van der Waals heterostructures to take advantage of their remarkable spintronic properties and engineer proximity-induced spin-charge conversion phenomena. In these heterostructures, we experimentally demonstrate a gate tunable spin-galvanic effect (SGE) at room temperature, allowing for efficient conversion of a nonequilibrium spin polarization into a transverse charge current. Systematic measurements of SGE in various device geometries via a spin switch, spin precession, and magnetization rotation experiments establish the robustness of spin-charge conversion in the Gr-TI heterostructures. Importantly, using a gate voltage, we reveal a strong electric field tunability of both amplitude and sign of the spin-galvanic signal. These findings provide an efficient route for realizing all-electrical and gate-tunable spin-orbit technology using TIs and graphene in heterostructures, which can enhance the performance and reduce power dissipation in spintronic circuits.