Etching and Narrowing of Graphene from the Edges

Large scale graphene electronics desires lithographic patterning of narrow graphene nanoribbons (GNRs) for device integration. However, conventional lithography can only reliably pattern ~20nm wide GNR arrays limited by lithography resolution, while sub-5nm GNRs are desirable for high on/off ratio field-effect transistors (FETs) at room temperature. Here, we devised a gas phase chemical approach to etch graphene from the edges without damaging its basal plane. The reaction involved high temperature oxidation of graphene in a slightly reducing environment to afford controlled etch rate (\leq ~1nm/min). We fabricated ~20-30nm wide GNR arrays lithographically, and used the gas phase etching chemistry to narrow the ribbons down to <10nm. For the first time, high on/off ratio up to ~10^4 was achieved at room temperature for FETs built with sub-5nm wide GNR semiconductors derived from lithographic patterning and narrowing. Our controlled etching method opens up a chemical way to control the size of various graphene nano-structures beyond the capability of top-down lithography.

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