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Paper detail

APEnet+: high bandwidth 3D torus direct network for petaflops scale commodity clusters

We describe herein the APElink+ board, a PCIe interconnect adapter featuring the latest advances in wire speed and interface technology plus hardware support for a RDMA programming model and experimental acceleration of GPU networking; this design allows us to build a low latency, high bandwidth PC cluster, the APEnet+ network, the new generation of our cost-effective, tens-of-thousands-scalable cluster network architecture. Some test results and characterization of data transmission of a complete testbench, based on a commercial development card mounting an Altera FPGA, are provided.

preprint2011arXivOpen access
Roberto AmmendolaAndrea BiagioniOttorino FrezzaFrancesca Lo CiceroAlessandro LonardoPier Stanislao PaolucciDavide RossettiAndrea SalamonGaetano SalinaFrancesco SimulaLaura TosorattoPiero Vicini
Hardware Architecturephysics.comp-ph
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Roberto AmmendolaAndrea BiagioniOttorino FrezzaFrancesca Lo CiceroAlessandro LonardoPier Stanislao PaolucciDavide RossettiAndrea SalamonGaetano SalinaFrancesco SimulaLaura TosorattoPiero Vicini

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